A new failure mechanism on analog I/O cell under ND-mode ESD stress in deep-submicron CMOS technology

Shih Hung Chen*, Ming-Dou Ker, Che Hao Chuang

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

A new ESD failure mechanism has been found in the analog pins with pure-diode protection scheme during ND-mode ESD stress. The failure is caused by the parasitic npn interaction between ESD protection diode and guard ring structure. The parasitic npn bipolar, which was constructed between the N+/PW diode and the N+/NW guard ring, provides the discharging path between the I/O pad to the grounded VDD under the ND-mode ESD stress to cause a low ESD robustness of the analog I/O cell. The solution to overcome this ESD failure is also proposed.

Original languageEnglish
Pages209-212
Number of pages4
StatePublished - 5 Dec 2005
Event12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2005 - Singapore, Singapore
Duration: 27 Jun 20051 Jul 2005

Conference

Conference12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2005
CountrySingapore
CitySingapore
Period27/06/051/07/05

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