A new bi-directional PMOSFET hot-carrier degradation model for circuit reliability simulation

C. C. Li, K. N. Quader, E. R. Minami, Chen-Ming Hu, P. K. Ko

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

13 Scopus citations

Abstract

In this paper, the concept of channel shortening is used to model hot-carrier induced PMOSFET drain current degradation. This new approach models the asymmetric drain current degradation in forward and reverse modes of operation and provides the capability to simulate bi-directional stress. We will present the model, its implementation in BERT (BErkeley Reliability Tools), and simulation results of uni- and bi-directionally stressed circuits.

Original languageEnglish
Title of host publication1992 International Technical Digest on Electron Devices Meeting, IEDM 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages547-550
Number of pages4
ISBN (Electronic)0780308174
DOIs
StatePublished - 1 Jan 1992
Event1992 International Technical Digest on Electron Devices Meeting, IEDM 1992 - San Francisco, United States
Duration: 13 Dec 199216 Dec 1992

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume1992-December
ISSN (Print)0163-1918

Conference

Conference1992 International Technical Digest on Electron Devices Meeting, IEDM 1992
CountryUnited States
CitySan Francisco
Period13/12/9216/12/92

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