A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes

Tzu Ming Wang; Wan Yi Shen; Ming-Dou Ker

doi:10.1109/ICECS.2007.4510966

A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes

Tzu Ming Wang^*, Wan Yi Shen, Ming-Dou Ker

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.

Original language	English
Title of host publication	ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems
Pages	206-209
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2007.4510966
State	Published - 1 Dec 2007
Event	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 - Marrakech, Morocco Duration: 11 Dec 2007 → 14 Dec 2007

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007
Country	Morocco
City	Marrakech
Period	11/12/07 → 14/12/07

Access to Document

10.1109/ICECS.2007.4510966

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Wang, T. M., Shen, W. Y., & Ker, M-D. (2007). A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. In ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems (pp. 206-209). [4510966] (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2007.4510966

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title = "A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes",

abstract = "A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.",

author = "Wang, {Tzu Ming} and Shen, {Wan Yi} and Ming-Dou Ker",

year = "2007",

month = dec,

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doi = "10.1109/ICECS.2007.4510966",

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series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

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booktitle = "ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems",

note = "null ; Conference date: 11-12-2007 Through 14-12-2007",

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Wang, TM, Shen, WY & Ker, M-D 2007, A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. in ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems., 4510966, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, pp. 206-209, 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007, Marrakech, Morocco, 11/12/07. https://doi.org/10.1109/ICECS.2007.4510966

A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. / Wang, Tzu Ming; Shen, Wan Yi; Ker, Ming-Dou.

ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 206-209 4510966 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.

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Wang TM, Shen WY, Ker M-D. A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. In ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 206-209. 4510966. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2007.4510966