A multiphase timing-skew calibration technique using zero-crossing detection

Chung Yi Wang*, Jieh-Tsorng Wu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

31 Scopus citations

Abstract

This paper describes a timing-skew calibration technique which equalizes the phase spacings among multiphase clocks. The scheme uses simple sample-and-hold circuits controlled by the multiphase clocks to sample a common reference input. Phase spacing is measured by counting the number of zero crossings between two adjacent sampling sequences. A zero-crossing detection scheme is proposed. It has better immunity against the offsets of the comparators used in the detector. A digital calibration processor is also proposed. It examines the outputs from the zero-crossing detectors, and then adjusts the delays of clock buffers in order to minimize timing skews. The proposed calibration scheme does not demand stringent requirement for the reference input. Its application to a eight-channel 6-b time-interleaved analog-to-digital converter is demonstrated.

Original languageEnglish
Pages (from-to)1102-1114
Number of pages13
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume56
Issue number6
DOIs
StatePublished - 21 Jul 2009

Keywords

  • Analog-digital conversion
  • Calibration
  • Clocks
  • Phase estimation
  • Time-interleaved
  • Timing circuits
  • Timing skew

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