A method to determine the located region of lateral trap position by analysis of three-level random telegraph signals in n-MOSFETs

Ching En Chen, Ting Chang Chang, Bo You, Jyun Yu Tsai, Wen Hung Lo, Szu Han Ho, Kuan Ju Liu, Ying Hsin Lu, Yu Ju Hung, Tseung-Yuen Tseng, James Wu, Wei Kung Tsai, Kuo Yu Chenge, Yong En Syu

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

This paper introduces a method to determine the located region of trap position by the analysis of three-level random telegraph signal (RTS) in partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect-transistors. For the cases of two traps, the average time at the 2nd level ({τ2}) is composed of average emission time of one trap and average capture time of the other. Comparison and analysis of (τ2) curves varying with gate voltage in RTS measurements with and without interchanged source/drain can clarify the located regions of the two traps. Moreover, the simplified equations are also considered and used to confirm the trap positions.

Original languageEnglish
Pages (from-to)Q47-Q49
JournalECS Solid State Letters
Volume4
Issue number10
DOIs
StatePublished - 1 Jan 2015

Fingerprint Dive into the research topics of 'A method to determine the located region of lateral trap position by analysis of three-level random telegraph signals in n-MOSFETs'. Together they form a unique fingerprint.

Cite this