A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique

Ying Wei Chou; Meng Wei Chien; Shin Chieh Chen; Ke-Horng Chen; Ying Hsi Lin; Tsung Yen Tsai; Chen Chih Huang; Chao Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin Yu Luo; Shih Ming Wang; Long Der Chen; Cheng Chen Yang; Huang Tian Hui

doi:10.1109/ISCAS.2014.6865725

A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique

Ying Wei Chou, Meng Wei Chien, Shin Chieh Chen, Ke-Horng Chen, Ying Hsi Lin, Tsung Yen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin Yu Luo, Shih Ming Wang, Long Der Chen, Cheng Chen Yang, Huang Tian Hui

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

An increased damping resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).

Original language	English
Title of host publication	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2680-2683
Number of pages	4
ISBN (Print)	9781479934324
DOIs	https://doi.org/10.1109/ISCAS.2014.6865725
State	Published - 1 Jan 2014
Event	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 1 Jun 2014 → 5 Jun 2014

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Country	Australia
City	Melbourne, VIC
Period	1/06/14 → 5/06/14

Keywords

audio amplifier
Class-D audio amplifier
clock-free
mobile application
offset cancellation
self-oscillating

Access to Document

10.1109/ISCAS.2014.6865725

Link to publication in Scopus

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Chou, Y. W., Chien, M. W., Chen, S. C., Chen, K-H., Lin, Y. H., Tsai, T. Y., Huang, C. C., Lee, C. C., Tai, Z. H., Cheng, Y. H., Tsai, C. C., Luo, H. Y., Wang, S. M., Chen, L. D., Yang, C. C., & Hui, H. T. (2014). A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 (pp. 2680-2683). [6865725] (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2014.6865725

Chou, Ying Wei ; Chien, Meng Wei ; Chen, Shin Chieh ; Chen, Ke-Horng ; Lin, Ying Hsi ; Tsai, Tsung Yen ; Huang, Chen Chih ; Lee, Chao Cheng ; Tai, Zhih Han ; Cheng, Yi Hsuan ; Tsai, Chi Chung ; Luo, Hsin Yu ; Wang, Shih Ming ; Chen, Long Der ; Yang, Cheng Chen ; Hui, Huang Tian. / A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 2680-2683 (Proceedings - IEEE International Symposium on Circuits and Systems).

@inproceedings{8beea8454af34f28ae298a53e3256feb,

title = "A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique",

abstract = "An increased damping resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).",

keywords = "audio amplifier, Class-D audio amplifier, clock-free, mobile application, offset cancellation, self-oscillating",

author = "Chou, {Ying Wei} and Chien, {Meng Wei} and Chen, {Shin Chieh} and Ke-Horng Chen and Lin, {Ying Hsi} and Tsai, {Tsung Yen} and Huang, {Chen Chih} and Lee, {Chao Cheng} and Tai, {Zhih Han} and Cheng, {Yi Hsuan} and Tsai, {Chi Chung} and Luo, {Hsin Yu} and Wang, {Shih Ming} and Chen, {Long Der} and Yang, {Cheng Chen} and Hui, {Huang Tian}",

year = "2014",

month = jan,

day = "1",

doi = "10.1109/ISCAS.2014.6865725",

language = "English",

isbn = "9781479934324",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "2680--2683",

booktitle = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014",

note = "null ; Conference date: 01-06-2014 Through 05-06-2014",

}

Chou, YW, Chien, MW, Chen, SC, Chen, K-H, Lin, YH, Tsai, TY, Huang, CC, Lee, CC, Tai, ZH, Cheng, YH, Tsai, CC, Luo, HY, Wang, SM, Chen, LD, Yang, CC & Hui, HT 2014, A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. in 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014., 6865725, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., pp. 2680-2683, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, Melbourne, VIC, Australia, 1/06/14. https://doi.org/10.1109/ISCAS.2014.6865725

A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. / Chou, Ying Wei; Chien, Meng Wei; Chen, Shin Chieh; Chen, Ke-Horng; Lin, Ying Hsi; Tsai, Tsung Yen; Huang, Chen Chih; Lee, Chao Cheng; Tai, Zhih Han; Cheng, Yi Hsuan; Tsai, Chi Chung; Luo, Hsin Yu; Wang, Shih Ming; Chen, Long Der; Yang, Cheng Chen; Hui, Huang Tian.

2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 2680-2683 6865725 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique

AU - Chou, Ying Wei

AU - Chien, Meng Wei

AU - Chen, Shin Chieh

AU - Chen, Ke-Horng

AU - Lin, Ying Hsi

AU - Tsai, Tsung Yen

AU - Huang, Chen Chih

AU - Lee, Chao Cheng

AU - Tai, Zhih Han

AU - Cheng, Yi Hsuan

AU - Tsai, Chi Chung

AU - Luo, Hsin Yu

AU - Wang, Shih Ming

AU - Chen, Long Der

AU - Yang, Cheng Chen

AU - Hui, Huang Tian

PY - 2014/1/1

Y1 - 2014/1/1

N2 - An increased damping resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).

AB - An increased damping resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8ω load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB).

KW - audio amplifier

KW - Class-D audio amplifier

KW - clock-free

KW - mobile application

KW - offset cancellation

KW - self-oscillating

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U2 - 10.1109/ISCAS.2014.6865725

DO - 10.1109/ISCAS.2014.6865725

M3 - Conference contribution

AN - SCOPUS:84907381037

SN - 9781479934324

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 2680

EP - 2683

BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 1 June 2014 through 5 June 2014

ER -

Chou YW, Chien MW, Chen SC, Chen K-H, Lin YH, Tsai TY et al. A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 2680-2683. 6865725. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2014.6865725