A low-power design for Reed-Solomon decoders

Hsie-Chia Chang*, Chen-Yi Lee

*Corresponding author for this work

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

In this paper, a low-power design for the Reed-Solomon (RS) decoder is presented. Our approach includes a novel two-stage syndrome calculator that reduces the syndrome computations by one-half, a modified Berlekamp-Massey algorithm in the key equation solver and a terminated mechanism in the Chien search circuit. The test chip for (255, 239) and (208, 192) RS decoders are implemented by 0.25 μm CMOS 1P5M and 0.35 μm CMOS SPQM standard cells, respectively. Simulation results show our approach can work successfully and achieved large reduction of power consumption on the average.

Original languageEnglish
Pages (from-to)159-170
Number of pages12
JournalJournal of Circuits, Systems and Computers
Volume12
Issue number2
DOIs
StatePublished - 1 Apr 2003

Keywords

  • Berlekamp-Massey algorithm
  • Euclidean algorithm
  • Low-power design
  • Reed-Soloman codes
  • Two-stage syndrome calculator

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