LINC can achieve linear amplification by using high-efficiency amplifiers. This work presents an all-digital LINC signal component separator (SCS) including the phase calculation digital signal processing and two digital-control phase shifters (DCPSs). With the duplicate DCPSs, a pre-calibration scheme is introduced to guarantee the codeword-to-phase linearity and accuracy under different PVT conditions. The proposed DCPS design provides 8-bit resolution at 100 MHz with RMS error 10 ps (0.36°) resulting in system EVM -29.21 dB with 64-QAM OFDM signals, and the performance can meet the requirements specified in IEEE 802.11a. This work is implemented in a 90nm CMOS process. With the voltage scaling scheme to specific power domains and the low-complexity DCPS design, the overall SCS consumes 850.51 μW from 0.5 V and 1.0 V supplies.