@inproceedings{62f5a62c924e48debc0b04a68489e457,
title = "A low power 2.4/5.2GHz concurrent receiver using current-reused architecture",
abstract = "This paper presents a low-power 2.4/5.2GHz concurrent receiver for emerging wireless sensing applications. The RF front-end design includes a concurrent dual-band low noise amplifier (LNA), a stacked mixer and VCO architecture, and variable-gain baseband amplifiers (VGA). Current-reused techniques, by sharing gain stages and stacked components, are explored in the receiver design for the further reduction of power consumption. The prototype chip, which was fabricated in a 0.18μm CMOS process, occupies a chip area of 3.67mm2, including pads and impedance matching networks. At the 2.4GHz band, the proposed receiver achieves a maximum gain of 43dB, a noise figure of 8.9dB, and a 1-dB compression point (P1dB) larger than -34dBm. At the 5.2GHz band, the proposed receiver achieves a maximum gain of 31dB, a noise figure of 16.3dB, and a P1dB larger than -27dBm. The total power consumption is 7.3mW at a supply voltage of 1.2V.",
keywords = "CMOS, current-reused, dual-band, low power",
author = "Hsu, {Hung Sheng} and Duan, {Qiu Yue} and Yu-Te Liao",
year = "2016",
month = jul,
day = "29",
doi = "10.1109/ISCAS.2016.7527511",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1398--1401",
booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",
address = "United States",
note = "null ; Conference date: 22-05-2016 Through 25-05-2016",
}