A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c transceiver

David Murphy*, Qun Jane Gu, Yi Cheng Wu, Heng Yu Jian, Zhiwei Xu, Adrian Tang, Frank Wang, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

65 Scopus citations

Abstract

A low phase noise, wideband, mm-wave, integer-N PLL that is capable of supporting an 802.15.3c heterodyne transceiver is reported. The PLL can generate 6 equally spaced tones from 43.2 GHz to 51.84 GHz, which is suitable for a heterodyne architecture with F LO =(4/5) × F TRX . Phase noise is measured directly at the F LO frequency and is better than -97.5 dBc/Hz@1 MHz across the entire band. The reported frequency synthesizer is smaller, exhibits less phase noise, and consumes less power than prior art. In addition, the F LO tone corresponds to the fundamental of the VCO as opposed to a higher harmonic.

Original languageEnglish
Article number5776718
Pages (from-to)1606-1617
Number of pages12
JournalIEEE Journal of Solid-State Circuits
Volume46
Issue number7
DOIs
StatePublished - 1 Jul 2011

Keywords

  • 60 GHz
  • mm-wave
  • phase noise
  • PLL
  • VCO
  • wideband

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