A low cost2-D inverse discrete cosine transform design for image-compression

Jiun-In  Guo

A low cost2-D inverse discrete cosine transform design for image-compression

Jiun-In Guo^*

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

This paper proposes a low cost 2-D inverse discrete cosine transform (IDCT) for image compression by using cyclic convolution and adder-based implementation. We formulate the 1-D IDCT into cyclic convolution and carry out the multiplications through adders by using the concept of common sub-expression sharing. The proposed 2-D IDCT design costs 7413 gates plus 1024 bits of memory with 66 MHz throughput based on a 0.35μm CMOS technology.

Original language	English
Journal	Materials Research Society Symposium - Proceedings
Volume	626
State	Published - 1 Jan 2001
Event	Thermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications - San Francisco, CA, United States Duration: 24 Apr 2000 → 27 Apr 2000

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title = "A low cost2-D inverse discrete cosine transform design for image-compression",

abstract = "This paper proposes a low cost 2-D inverse discrete cosine transform (IDCT) for image compression by using cyclic convolution and adder-based implementation. We formulate the 1-D IDCT into cyclic convolution and carry out the multiplications through adders by using the concept of common sub-expression sharing. The proposed 2-D IDCT design costs 7413 gates plus 1024 bits of memory with 66 MHz throughput based on a 0.35μm CMOS technology.",

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N2 - This paper proposes a low cost 2-D inverse discrete cosine transform (IDCT) for image compression by using cyclic convolution and adder-based implementation. We formulate the 1-D IDCT into cyclic convolution and carry out the multiplications through adders by using the concept of common sub-expression sharing. The proposed 2-D IDCT design costs 7413 gates plus 1024 bits of memory with 66 MHz throughput based on a 0.35μm CMOS technology.

AB - This paper proposes a low cost 2-D inverse discrete cosine transform (IDCT) for image compression by using cyclic convolution and adder-based implementation. We formulate the 1-D IDCT into cyclic convolution and carry out the multiplications through adders by using the concept of common sub-expression sharing. The proposed 2-D IDCT design costs 7413 gates plus 1024 bits of memory with 66 MHz throughput based on a 0.35μm CMOS technology.

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M3 - Conference article

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JO - Materials Research Society Symposium - Proceedings

JF - Materials Research Society Symposium - Proceedings

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Y2 - 24 April 2000 through 27 April 2000

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