A low-cost wear-leveling algorithm for block-mapping solid-state disks

Li-Pin Chang*, Li Chun Huang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Scopus citations

Abstract

Multilevel flash memory cells double or even triple storage density, producing affordable solid-state disks for end users. However, flash lifetime is becoming a critical issue in the popularity of solidstate disks. Wear-leveling methods can prevent flash-storage devices from prematurely retiring any portions of flash memory. The two practical challenges of wear-leveling design are implementation cost and tuning complexity. This study proposes a new wearleveling design that features both simplicity and adaptiveness. This design requires no new data structures, but utilizes the intelligence available in sector-translating algorithms. Using an on-line tuning method, this design adaptively tunes itself to reach good balance between wear evenness and overhead. A series of trace-driven simulations show that the proposed design outperforms a competitive existing design in terms of wear evenness and overhead reduction. This study also presents a prototype that proves the feasibility of this wear-leveling design in real solid-state disks.

Original languageEnglish
Title of host publicationLCTES'11 - Proceedings of the ACM SIGPLAN/SIGBED 2011 Conference on Languages, Compilers, Tools and Theory for Embedded Systems
Pages31-40
Number of pages10
DOIs
StatePublished - 10 May 2011
EventACM SIGPLAN/SIGBED Conference on Languages Compilers, Tools, and Theory for Embedded Systems, LCTES 2011 - Chicago, IL, United States
Duration: 11 Apr 201114 Apr 2011

Publication series

NameProceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Conference

ConferenceACM SIGPLAN/SIGBED Conference on Languages Compilers, Tools, and Theory for Embedded Systems, LCTES 2011
CountryUnited States
CityChicago, IL
Period11/04/1114/04/11

Keywords

  • Flash memory
  • Solid-state disks
  • Wear leveling

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    Chang, L-P., & Huang, L. C. (2011). A low-cost wear-leveling algorithm for block-mapping solid-state disks. In LCTES'11 - Proceedings of the ACM SIGPLAN/SIGBED 2011 Conference on Languages, Compilers, Tools and Theory for Embedded Systems (pp. 31-40). (Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)). https://doi.org/10.1145/1967677.1967683