A low-cost and high-throughput architecture for H.264/AVC integer transform by using four computation streams

Yuan Ho Chen*, Tsin Yuan Chang, Chih Wen Lu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

In this paper, a four paths H.264/AVC integer transform, which employs four computation paths to achieve a high throughput rate and is implemented by a using single one-dimensional (1-D) DCT core with one transpose memory (TMEM) to reduce the area cost, is proposed. The proposed 1-D integer transform can calculate first-dimensional (1 st-D) and second-dimensional (2 nd-D) transformations simultaneously in four parallel streams. The two-dimensional (2-D) integer transform utilizes a single 1-D transform core and one TMEM. Therefore, a high throughput rate and a low area cost are achieved in the proposed 2-D transform core. To evaluate the circuit performance of the proposed integer transform, the transform core is implemented in a TSMC 0.18-μm CMOS process. The proposed transform core can achieve a high throughput rate of 1 G-pels/s with only 17.7 K gate area.

Original languageEnglish
Title of host publication2011 International Symposium on Integrated Circuits, ISIC 2011
Pages380-383
Number of pages4
DOIs
StatePublished - 2011
Event2011 International Symposium on Integrated Circuits, ISIC 2011 - SingaporeSingapore, Singapore
Duration: 12 Dec 201114 Dec 2011

Publication series

Name2011 International Symposium on Integrated Circuits, ISIC 2011

Conference

Conference2011 International Symposium on Integrated Circuits, ISIC 2011
CountrySingapore
CitySingaporeSingapore
Period12/12/1114/12/11

Keywords

  • DA-based
  • Four paths
  • H.264/AVC
  • Integer transform
  • Simultaneous operation

Fingerprint Dive into the research topics of 'A low-cost and high-throughput architecture for H.264/AVC integer transform by using four computation streams'. Together they form a unique fingerprint.

  • Cite this

    Chen, Y. H., Chang, T. Y., & Lu, C. W. (2011). A low-cost and high-throughput architecture for H.264/AVC integer transform by using four computation streams. In 2011 International Symposium on Integrated Circuits, ISIC 2011 (pp. 380-383). [6131976] (2011 International Symposium on Integrated Circuits, ISIC 2011). https://doi.org/10.1109/ISICir.2011.6131976