Power dissipation and power density are limiting the maximum operating frequency of highperformance circuits. This has forced a change in the micro-architecture of processors. High frequency, complex single-core architectures are replaced by simpler multi-core architectures that operate at a lower frequency (Fig.1) [1-4]. At sub-22nm nodes, cooling even the multi-core processors using economical cooling options will be challenging due to increasing power density. Hence, there is an imminent need to identify sources with potential to address this issue at the device level so that the benefits can propagate to the circuit level. In this work, we discuss the difference in the difference in the nature of parasitic capacitance in FinFETs and Planar MOSFETs, and its significant impact on circuit performance. Ultra-Thin Body SOI (UTBSOI) MOSFETs  is used as an example for Planar MOSFETs.