A line-based, memory efficient and programmable architecture for 2D DWT using lifting scheme

Wei Hsin Chang, Yew San Lee, Wen-Shiaw Peng, Chen-Yi Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

38 Scopus citations

Abstract

In this paper, we present a memory efficient VLSI architecture for 2-D Discrete Wavelet Transform (DWT) using lifting scheme. The advantages of lifting scheme are lower computational complexity, transforming signal without extension and reduced memory requirement. It decomposes the wavelet transform with finite taps into two coefficient sets named predictor and updater. Base on the lifting scheme, we explore its data dependency of input and output signals, and thus propose a programmable architecture for different filter banks with low memory usage. For the computation of NxN 2-D DWT with Daubechies 9-7 filter, our architecture requires 9N storage cells and the memory bandwidth requirement is almost one-half of JPEG2000's proposal. This architecture is suitable for VLSI implementation and various real-time image/video applications.

Original languageEnglish
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages330-333
Number of pages4
Volume626
DOIs
StatePublished - 1 Dec 2001
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: 6 May 20019 May 2001

Publication series

NameISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume4

Conference

Conference2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
CountryAustralia
CitySydney, NSW
Period6/05/019/05/01

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