A lateral P-SI-N diode SPDT switch for Ka-band applications

Mitsuru Tanabe; Junko Sato Iwanaga; Motonori Ishii; Kazuo Miyatsuji; Yorito Ota; Daisuke Ueda

doi:10.1109/GAAS.1999.803772

A lateral P-SI-N diode SPDT switch for Ka-band applications

Mitsuru Tanabe^*, Junko Sato Iwanaga, Motonori Ishii, Kazuo Miyatsuji, Yorito Ota, Daisuke Ueda

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

We report on lateral GaAs P-Semi-Insulator-N diode switches. The single P-Semi-Insulator-N structure showed the insertion loss of as low as 0.66 dB and the implemented SPDT switch that comprised the diodes exhibited the insertion loss of as low as 1.8 dB and isolation of 35 dB at 30 GHz. The proposed P-Semi-Insulator-N structure was easily formed by ion-implant technique and makes it possible to integrate with any active devices.

Original language	English
Title of host publication	Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
Publisher	IEEE
Pages	263-266
Number of pages	4
ISBN (Print)	0780355865
DOIs	https://doi.org/10.1109/GAAS.1999.803772
State	Published - 1 Dec 1999
Event	Proceedings of the 199 21st Annual IEEE Gallium Arsenide Integrated Circuit Symposium (IEEE GaAs IC Symposium) - Monterey, CA, USA Duration: 17 Oct 1999 → 20 Oct 1999

Publication series

Name	Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Conference

Conference	Proceedings of the 199 21st Annual IEEE Gallium Arsenide Integrated Circuit Symposium (IEEE GaAs IC Symposium)
City	Monterey, CA, USA
Period	17/10/99 → 20/10/99

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10.1109/GAAS.1999.803772

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title = "A lateral P-SI-N diode SPDT switch for Ka-band applications",

abstract = "We report on lateral GaAs P-Semi-Insulator-N diode switches. The single P-Semi-Insulator-N structure showed the insertion loss of as low as 0.66 dB and the implemented SPDT switch that comprised the diodes exhibited the insertion loss of as low as 1.8 dB and isolation of 35 dB at 30 GHz. The proposed P-Semi-Insulator-N structure was easily formed by ion-implant technique and makes it possible to integrate with any active devices.",

author = "Mitsuru Tanabe and Iwanaga, {Junko Sato} and Motonori Ishii and Kazuo Miyatsuji and Yorito Ota and Daisuke Ueda",

year = "1999",

month = dec,

day = "1",

doi = "10.1109/GAAS.1999.803772",

language = "English",

isbn = "0780355865",

series = "Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)",

publisher = "IEEE",

pages = "263--266",

booktitle = "Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)",

note = "null ; Conference date: 17-10-1999 Through 20-10-1999",

}

Tanabe, M, Iwanaga, JS, Ishii, M, Miyatsuji, K, Ota, Y & Ueda, D 1999, A lateral P-SI-N diode SPDT switch for Ka-band applications. in Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit). Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit), IEEE, pp. 263-266, Proceedings of the 199 21st Annual IEEE Gallium Arsenide Integrated Circuit Symposium (IEEE GaAs IC Symposium), Monterey, CA, USA, 17/10/99. https://doi.org/10.1109/GAAS.1999.803772

A lateral P-SI-N diode SPDT switch for Ka-band applications. / Tanabe, Mitsuru; Iwanaga, Junko Sato; Ishii, Motonori; Miyatsuji, Kazuo; Ota, Yorito; Ueda, Daisuke.

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit). IEEE, 1999. p. 263-266 (Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A lateral P-SI-N diode SPDT switch for Ka-band applications

AU - Tanabe, Mitsuru

AU - Iwanaga, Junko Sato

AU - Ishii, Motonori

AU - Miyatsuji, Kazuo

AU - Ota, Yorito

AU - Ueda, Daisuke

PY - 1999/12/1

Y1 - 1999/12/1

N2 - We report on lateral GaAs P-Semi-Insulator-N diode switches. The single P-Semi-Insulator-N structure showed the insertion loss of as low as 0.66 dB and the implemented SPDT switch that comprised the diodes exhibited the insertion loss of as low as 1.8 dB and isolation of 35 dB at 30 GHz. The proposed P-Semi-Insulator-N structure was easily formed by ion-implant technique and makes it possible to integrate with any active devices.

AB - We report on lateral GaAs P-Semi-Insulator-N diode switches. The single P-Semi-Insulator-N structure showed the insertion loss of as low as 0.66 dB and the implemented SPDT switch that comprised the diodes exhibited the insertion loss of as low as 1.8 dB and isolation of 35 dB at 30 GHz. The proposed P-Semi-Insulator-N structure was easily formed by ion-implant technique and makes it possible to integrate with any active devices.

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U2 - 10.1109/GAAS.1999.803772

DO - 10.1109/GAAS.1999.803772

M3 - Conference contribution

AN - SCOPUS:0033323709

SN - 0780355865

T3 - Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

SP - 263

EP - 266

BT - Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

PB - IEEE

Y2 - 17 October 1999 through 20 October 1999

ER -

A lateral P-SI-N diode SPDT switch for Ka-band applications

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