A lateral P-SI-N diode SPDT switch for Ka-band applications

Mitsuru Tanabe*, Junko Sato Iwanaga, Motonori Ishii, Kazuo Miyatsuji, Yorito Ota, Daisuke Ueda

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We report on lateral GaAs P-Semi-Insulator-N diode switches. The single P-Semi-Insulator-N structure showed the insertion loss of as low as 0.66 dB and the implemented SPDT switch that comprised the diodes exhibited the insertion loss of as low as 1.8 dB and isolation of 35 dB at 30 GHz. The proposed P-Semi-Insulator-N structure was easily formed by ion-implant technique and makes it possible to integrate with any active devices.

Original languageEnglish
Title of host publicationTechnical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
PublisherIEEE
Pages263-266
Number of pages4
ISBN (Print)0780355865
DOIs
StatePublished - 1 Dec 1999
EventProceedings of the 199 21st Annual IEEE Gallium Arsenide Integrated Circuit Symposium (IEEE GaAs IC Symposium) - Monterey, CA, USA
Duration: 17 Oct 199920 Oct 1999

Publication series

NameTechnical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Conference

ConferenceProceedings of the 199 21st Annual IEEE Gallium Arsenide Integrated Circuit Symposium (IEEE GaAs IC Symposium)
CityMonterey, CA, USA
Period17/10/9920/10/99

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  • Cite this

    Tanabe, M., Iwanaga, J. S., Ishii, M., Miyatsuji, K., Ota, Y., & Ueda, D. (1999). A lateral P-SI-N diode SPDT switch for Ka-band applications. In Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit) (pp. 263-266). (Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)). IEEE. https://doi.org/10.1109/GAAS.1999.803772