@inproceedings{7226425b56e349cd99bc908b99c01809,
title = "A high-speed HBT prescaler based on the divideby-two topology",
abstract = "This paper demonstrates the Divide-by-4/5 prescalers with merged AND gates in 2 μm GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35 μm SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fT), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz ∼ 8 GHz at the cost of power consumption.",
keywords = "Divide-by-4/5, Dual-modulus, Emitter couple logic (ECL), GaInP/GaAs HBT, Prescaler, SiGe HBT",
author = "Wei, {Hung Ju} and Chin-Chun Meng and Chang, {Yu Wen} and Lin, {Yi Chen} and Huang, {Guo Wei}",
year = "2007",
month = dec,
day = "1",
doi = "10.1109/APMC.2007.4554716",
language = "English",
isbn = "1424407494",
series = "Asia-Pacific Microwave Conference Proceedings, APMC",
booktitle = "2007 Asia-Pacific Microwave Conference, APMC",
note = "null ; Conference date: 11-12-2007 Through 14-12-2007",
}