A high-performance low power direct 2-D transform coding IP design for MPEG-4 AVC/H.264 with a switching power suppression technique

Kuan Hung Chen*, Jiun-In  Guo, Kuo Chuan Chao, Jinn Shyan Wang, Yuan Sun Chu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

This paper proposes a high-performance low-power direct 2-D transform coding IP design for H.264 with a switching power suppression technique. The proposed transform coding design not only suitably arranges the data sequences in row and column transforms to greatly increase the data processing rate but also takes advantage of the correlation existed in natural video sequences to suppress the spurious switching power. When compared with the parallel transform architecture [2], this design possesses 4 times higher data processing rate (in terms of pixels/cycle) and 3.52 times higher throughput (in terms of pixels/sec) at the cost of 1.80 times hardware cost in computing the multi-transform for H.264. In addition, without voltage scaling, the power consumed by the proposed forward transform design is only 35% of that consumed by the forward transform design in [2] to maintain the same throughput. When the proposed switching power suppression technique is applied, the proposed transform design can perform digital cinema video coding format by consuming only 1.86 mW.

Original languageEnglish
Title of host publication2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
Pages291-294
Number of pages4
DOIs
StatePublished - 1 Dec 2005
Event2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) - Hsinchu, Taiwan
Duration: 27 Apr 200529 Apr 2005

Publication series

Name2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
Volume2005

Conference

Conference2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
CountryTaiwan
CityHsinchu
Period27/04/0529/04/05

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    Chen, K. H., Guo, J-I., Chao, K. C., Wang, J. S., & Chu, Y. S. (2005). A high-performance low power direct 2-D transform coding IP design for MPEG-4 AVC/H.264 with a switching power suppression technique. In 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) (pp. 291-294). [1500078] (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); Vol. 2005). https://doi.org/10.1109/VDAT.2005.1500078