A high-performance input access scheme for ATM multicast switching

Yieh R. Haung*, Maria C. Yuang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, we propose an input access scheme for input-queued ATM multicast switches, achieving high system throughput, low packet delay and packet loss probability. Multicast and unicast packets of each input port are separately queued. Multicast queues take priority over the unicast queues, and both types of queues are fairly served in a cyclic-priority access discipline. In particular, each unicast queue is handled on a window-service basis, and each multicast packet is switched in a one-shot scheduling manner. To evaluate the performance of the access scheme, we propose an approximate analysis based on a simplified cyclic-priority model for an N × N finite-buffer multicast switch possessing Bernoulli multicast and unicast arrivals, with window-service (for unicasting) and one-shot scheduling (for multicasting) both taken into account. Finally, we show simulation results to demonstrate the accuracy of the approximate analysis and the superiority of the scheme over existing schemes with respect to normalized system throughput, mean packet delay, and packet loss probability.

Original languageEnglish
Pages (from-to)367-379
Number of pages13
JournalTelecommunication Systems
Volume6
Issue number1
DOIs
StatePublished - Dec 1996

Keywords

  • Artificial Intelligence
  • Communication Network
  • Stochastic Process
  • Probability Theory
  • Packet Delay

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