A High Efficiency and Fast Transient Digital Low-Dropout Regulator with the Burst Mode Corresponding to the Power-Saving Modes of DC-DC Switching Converters

Jian He Lin, Shang Hsien Yang, Balakumar Muniandi, Yu Sheng Ma, Chia Ming Huang, Ke Horng Chen*, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

*Corresponding author for this work

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

The proposed digital low-dropout regulator uses nonlinear switching control (NLSC) technique to suppress voltage ripple to less than 6 mV when the switching noise voltage of a switching regulator operating in a power-saving mode is greater than 50 mV. In addition, the NLSC technique improves the current efficiency by reducing the quiescent current to less than 10 μA and reduces the switching power loss through variable switching frequency control. With a load step of 1-20 mA, the transient response time is 1.3 μs and the peak current efficiency is 99.8% at heavy loads.

Original languageEnglish
Article number8823974
Pages (from-to)3997-4008
Number of pages12
JournalIEEE Transactions on Power Electronics
Volume35
Issue number4
DOIs
StatePublished - Apr 2020

Keywords

  • Digital low-dropout regulator (DLDO)
  • nonlinear switch control (NLSC) technique
  • power-saving mode
  • variable switching frequency control

Fingerprint Dive into the research topics of 'A High Efficiency and Fast Transient Digital Low-Dropout Regulator with the Burst Mode Corresponding to the Power-Saving Modes of DC-DC Switching Converters'. Together they form a unique fingerprint.

  • Cite this