A fast parallel implementation of Feng-Rao algorithm with systolic array structure

Chih-Wei Liu, Ku Tai Huang, Chung Chin Lu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

We develop a parallel implementation of Feng-Rao algorithm (1993) with systolic array architecture by adopting a specially arranged syndrome matrix. The specially arranged syndrome matrix is in a nearly Hermitian or Hankel form. This parallel decoding architecture can correct up to i errors, where t is equal to half of the Feng-Rao bound, and has the time complexity (m+g+1) by using a series of (t+[(g-1)/2]+1) effective processors (or cells) and g trivial processors. The control circuit for the proposed systolic array architecture is quite simple and a circuit for performing the majority voting scheme is also developed. The proposed architecture without inclusion of the majority voting scheme requires totally t+[(g-1)/2] inversion circuits and (t+[(g-1)/2]) (t+1+[(g-1)/2])/2 multipliers. In a practical design, this hardware complexity is acceptable.

Original languageEnglish
Title of host publicationProceedings - 1997 IEEE International Symposium on Information Theory, ISIT 1997
Number of pages1
DOIs
StatePublished - 1 Dec 1997
Event1997 IEEE International Symposium on Information Theory, ISIT 1997 - Ulm, Germany
Duration: 29 Jun 19974 Jul 1997

Publication series

NameIEEE International Symposium on Information Theory - Proceedings
ISSN (Print)2157-8095

Conference

Conference1997 IEEE International Symposium on Information Theory, ISIT 1997
CountryGermany
CityUlm
Period29/06/974/07/97

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