Abstract
A dynamic-voltage-adjustment mechanism was proposed to minimize the power consumption of a flash memory storage system, depending on the system workload. A scheduling framework was also proposed and combined with a voltage adjustment mechanism. The experiments over typical NOR flash memory showed good results.
Original language | English |
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Pages (from-to) | 218-219 |
Number of pages | 2 |
Journal | Digest of Technical Papers - IEEE International Conference on Consumer Electronics |
DOIs | |
State | Published - 1 Jan 2001 |
Event | 2001 Digest of Technical Papers -International Conference on Consumer Electronics - Los Angeles, CA, United States Duration: 19 Jun 2001 → 21 Jun 2001 |