A DVS embedded power management for high efficiency integrated SoC in UWB system

Yu Huei Lee*, Shin Jung Wang, Yao Yi Yang, Kuo Lin Zheng, Po Fung Chen, Chun Yu Hsieh, Yu Zhou Ke, Ke-Horng Chen, Yi Kuang Chen, Chen Chih Huang, Ying Hsi Lin

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

The proposed power management module with 1 V low-voltage PWM controller and dynamic self-biasing mechanism is designed to integrate with ultra-wide band (UWB) system. The on-chip pre-regulator with power conditioning circuit provides a constant and noiseless supply voltage. Instead of using large external compensation circuit, the compensation enhancement multistage amplifier Increases system loop gain and stabilizes the system. Moreover, the proposed self-biasing mechanism enhances the power conversion efficiency by 4 % through the handover technique. The fabricated power management module occupies 0.356 mm2 silicon in 65nm CMOS. With the excellent line/load transient response and the highest efficiency about 93.5%, the proposed power management has the qualification to be integrated in today's system-on-chip (SoC) applications.

Original languageEnglish
Title of host publicationProceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
Pages321-324
Number of pages4
DOIs
StatePublished - 1 Dec 2009
Event2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 - Taipei, Taiwan
Duration: 16 Nov 200918 Nov 2009

Publication series

NameProceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009

Conference

Conference2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
CountryTaiwan
CityTaipei
Period16/11/0918/11/09

Fingerprint Dive into the research topics of 'A DVS embedded power management for high efficiency integrated SoC in UWB system'. Together they form a unique fingerprint.

Cite this