A double-sided, single-chip integration scheme using through-silicon-via for neural sensing applications

Chih Wei Chang, Lei Chun Chou, Po-Tsang Huang, Shang Lin Wu, Shih Wei Lee, Ching Te Chuang, Kuan-Neng Chen, Wei Hwang, Kuo Hua Chen, Chi Tsung Chiu, Ho Ming Tong, Jin-Chern Chiou*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

7 Scopus citations


We present a new double-sided, single-chip monolithic integration scheme to integrate the CMOS circuits and MEMS structures by using through-silicon-via (TSV). Neural sensing applications were chosen as the implementation example. The proposed heterogeneous device integrates standard 0.18 μm CMOS technology, TSV and neural probe array into a compact single chip device. The neural probe array on the back-side of the chip is connected to the CMOS circuits on the front-side of the chip by using low-parasitic TSVs through the chip. Successful fabrication results and detailed characterization demonstrate the feasibility and performance of the neural probe array, TSV and readout circuitry. The fabricated device is 5 × 5 mm2 in area, with 16 channels of 150 μm-in-length neural probe array on the back-side, 200 μm-deep TSV through the chip and CMOS circuits on the front-side. Each channel consists of a 5 × 6 probe array, 3 × 14 TSV array and a differential-difference amplifier (DDA) based analog front-end circuitry with 1.8 V supply, 21.88 μW power consumption, 108 dB CMRR and 2.56 μVrms input referred noise. In-vivo long term implantation demonstrated the feasibility of presented integration scheme after 7 and 58 days of implantation. We expect the conceptual realization can be extended for higher density recording array by using the proposed method.

Original languageEnglish
JournalBiomedical Microdevices
Issue number1
StatePublished - 1 Jan 2015


  • CMOS technology
  • Electrode
  • Heterogeneous integration
  • Neural probe array
  • Through silicon via

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