A display order oriented Scalable Video Decoder

Jia Bin Huang*, Yu Kun Lin, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

As network technologies advance, Scalable Video Coding (SVC) has become increasingly popular due to its universal multimedia access capability and competitive compression performance with the state-of-the-art single-layer video coding. However, it's decoding delay, memory bandwidth and storage requirement are much larger than those of single-layer video coding due to various scalabilities. In this paper, we propose a novel display order instead of direct bitstream order oriented decoding method for the SVC decoder to solve above implementation problems. The analysis for hardware-oriented algorithm shows that the proposed decoding order can reduce the decoding delay, memory bandwidth and storage requirement significantly while is still applicable to various scalable requirements.

Original languageEnglish
Title of host publicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages1976-1979
Number of pages4
DOIs
StatePublished - 1 Dec 2006
EventAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - , Singapore
Duration: 4 Dec 20066 Dec 2006

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
CountrySingapore
Period4/12/066/12/06

Keywords

  • H.264/AVC
  • Motion compensated temporal filtering
  • Scalable video coding

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