Abstract
A new background calibration technique for pipelined analog-to-digital converters is proposed. By dividing the step sizes of the multiplying digital-to-analog converter (MDAC) in a pipeline stages and injecting a random signal into the MDAC, it is possible to calibrate a pipeline stage without interrupting the normal analog-to-digital operation. The calibration can eliminate the nonlinear effects due to the MDAC's gain error, input offset voltage, and output errors in the digital-to-analog conversion.
Original language | English |
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Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 1 |
DOIs | |
State | Published - 14 Jul 2003 |
Event | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003 |