A design of 2.6 GHz auto-biasing cascode class-E PA with Vdd/AM and Vdd/PM compensations in EER system

Wen An Tsou, Wen Shen Wuen, Kuei-Ann Wen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An auto-biasing cascode class-E PA which can compensate the Vdd/AM and Vdd/PM distortion resulting from supply modulation has been proposed. The output voltage of auto-biasing control circuit is generated and varied linearly with PA's supply voltage so that the cascode transistor is degenerated into a resistance and the PA's nonlinear distortion can be compensated. The simulation result shows that the distortion is compensated evidently and the system cosimulation demonstrated that system EVM can be improved from -17 to -19dB. Also, the drain efficiency of the PA can be improved 15% within small supply voltage range.

Original languageEnglish
Title of host publicationProceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009
Pages47-50
Number of pages4
DOIs
StatePublished - 6 Nov 2009
Event2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009 - Chengdu, China
Duration: 16 May 200917 May 2009

Publication series

NameProceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009

Conference

Conference2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009
CountryChina
CityChengdu
Period16/05/0917/05/09

Keywords

  • Class-E power amplifier
  • Envelope elimination and restoration (EER)
  • Trnsmitters

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    Tsou, W. A., Wuen, W. S., & Wen, K-A. (2009). A design of 2.6 GHz auto-biasing cascode class-E PA with Vdd/AM and Vdd/PM compensations in EER system. In Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009 (pp. 47-50). [5232283] (Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and System, PACCS 2009). https://doi.org/10.1109/PACCS.2009.109