A cost-efficient online recursive ica implementation for portable real-time EEG systems

Chiu Kuo Chen, Wai Chi Fang*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

This paper presents a cost-efficient online recursive independent component analysis (ORICA) implementation with artifacts removal for eight-channel electroencephalogram (EEG) signal separation. The proposed architecture mainly comprises a centering and whitening unit, a shared arithmetic calculation unit, a shared memory unit, an ORICA weight training unit, and an output interface unit. With employing schemes of effectively sharing hardware resources and scheduling data streams, the proposed ORICA implementation can save hardware complexity and power consumption. The proposed design was fabricated using 90 nm CMOS technology with a core area of 1200 × 1200 μm2 and power consumption of 2.859 mW at 50 MHz and 1.0 V.

Original languageEnglish
Pages (from-to)93-103
Number of pages11
JournalInternational Journal of Electrical Engineering
Volume27
Issue number3
DOIs
StatePublished - Jun 2020

Keywords

  • Biomedical signal processing
  • Brain-computer interface (BCI)
  • Chip
  • Electroencephalogram (EEG)
  • Online recursive Independent component analysis (ORICA)

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