In this paper a computationally efficient surface-potential-based compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates is presented. A fully-depleted SOI MOSFET with a back-gate is essentially an independent double-gate device. To the best of our knowledge, existing surface-potential-based models for independent double-gate devices require numerical iteration to compute the surface potentials. This increases the model computational time and may cause convergence difficulties. In this work, a new approximation scheme is developed to compute the surface potentials and charge densities using explicit analytical equations. The approximation is shown to be computationally efficient and preserves important properties of fully-depleted SOI MOSFETs such as volume inversion. Drain current and charge expressions are derived without using the charge sheet approximation and agree well with TCAD simulations. Non-ideal effects are added to describe the I-V and C-V of a real device. Source-drain symmetry is preserved for both the current and the charge models. The full model is implemented in Verilog-A and its convergence is demonstrated through transient simulation of a coupled ring oscillator circuit with 2020 transistors.
- Berkeley short channel insulated-gate FET model (BSIM)
- Compact modeling
- Computational efficiency
- Double-gate MOSFET
- Fully-depleted SOI MOSFET