A BU-based rate control design for H.264 and AVS video coding with ROI support

Ping Tsung Wu*, Tzu Chun Chang, Ching Lung Su, Jiun-In  Guo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Rate control (RC) techniques play an important role for interactive video coding applications, especially in video streaming applications with bandwidth constraints. In this paper we propose a new BU-level rate control algorithm with ROI support and the associated architecture for H.264 and AVS by exploiting a new predictor model to predict the MAD value and target bits for hardware realization. The proposed algorithm breaks up the sequential processing dependence in the original H.264/AVS RC algorithm and reduces up to 80.6% of internal buffer size for D1 video encoding, while maintaining good video quality.

Original languageEnglish
Title of host publicationProceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010
Pages215-218
Number of pages4
DOIs
StatePublished - 8 Nov 2010
Event2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010 - Hsin Chu, Taiwan
Duration: 26 Apr 201029 Apr 2010

Publication series

NameProceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010

Conference

Conference2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010
CountryTaiwan
CityHsin Chu
Period26/04/1029/04/10

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