A bending n-well ballast layout to improve esd robustness in fully-silicided CMOS technology

Yong Ru Wen*, Ming-Dou Ker, Wen Yi Chen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Ballast technique has been reported as a cost effective method to improve ESD robustness of fully-silicided devices without using silicide block. In this work, a new ballast technique, the bending N-Well (BNW) ballast structure, is proposed to enhance ESD robustness of fully-silicided NMOS. With a deep N-Well to cover the fully-silicided NMOS with BNW ballast structure, ESD robustness of the NMOS can be further improved by enhancing the turn-on uniformity among the multi-fingers of the NMOS.

Original languageEnglish
Title of host publication2010 IEEE International Reliability Physics Symposium, IRPS 2010
Pages857-860
Number of pages4
DOIs
StatePublished - 20 Oct 2010
Event2010 IEEE International Reliability Physics Symposium, IRPS 2010 - Garden Grove, CA, Canada
Duration: 2 May 20106 May 2010

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Conference

Conference2010 IEEE International Reliability Physics Symposium, IRPS 2010
CountryCanada
CityGarden Grove, CA
Period2/05/106/05/10

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