A 94 GHz 10.8 mW low-noise amplifier with inductive gain boosting in 40 nm digital CMOS technology

Po Chen Yeh, Chien Nan Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A W-band low-power, low-noise amplifier is designed and fabricated in 40 nm digital CMOS technology. The method of inductive gain boosting is utilized without extra power consumption. The circuit only consumes 10.8 mW dc power with a supply voltage of 1 V. The measured peak power gain achieves 14.5 dB at 93 GHz, while the minimum noise figure is 6.4 dB at 89 GHz. The circuit occupies a core area of only 0.07 mm2.

Original languageEnglish
Title of host publicationProceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1357-1359
Number of pages3
ISBN (Electronic)9781728135175
DOIs
StatePublished - Dec 2019
Event2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore
Duration: 10 Dec 201913 Dec 2019

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2019-December

Conference

Conference2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
CountrySingapore
CitySingapore
Period10/12/1913/12/19

Keywords

  • CMOS
  • Gain-boosting
  • Low noise amplifier
  • Low-power
  • Millimeter-wave
  • W-Band

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    Yeh, P. C., & Kuo, C. N. (2019). A 94 GHz 10.8 mW low-noise amplifier with inductive gain boosting in 40 nm digital CMOS technology. In Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 (pp. 1357-1359). [9038505] (Asia-Pacific Microwave Conference Proceedings, APMC; Vol. 2019-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APMC46564.2019.9038505