A 78 ∼ 102 GHz front-end receiver in 90 nm CMOS technology

Hsuan Yi Su*, Shu-I Hu, Chung-Yu Wu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

In this letter, a 78 ∼ 102 GHz front-end receiver designed in 90 nm CMOS technology is presented. It consists of an ultra-wideband low-noise amplifier, a subharmonic mixer, and an IF buffer. This receiver has a peak gain of 11.8 dB at 94 GHz with the noise figure of 13.4 dB. The measured input-referred 1 dB compression point is -14.5 dBm and the total power dissipation is 18.6 mW. The chip size is 680 × 1020 μm2.

Original languageEnglish
Article number5982100
Pages (from-to)489-491
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume21
Issue number9
DOIs
StatePublished - 1 Sep 2011

Keywords

  • CMOS receiver
  • low noise amplifier (LNA)
  • subharmonic mixer
  • ultra wideband (UWB)
  • W-band

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