A 7.11mJ/Gb/query data-driven machine learning processor (D2MLP) for big data analysis and applications

Chang Hung Tsai, Tung Yu Wu, Shu Yu Hsu, Chia Ching Chu, Fang Ju Ku, Ying Siou Laio, Chih Lung Chen, Wing Hung Wong, Hsie-Chia Chang, Chen-Yi Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A data-driven machine learning processor (D2MLP) with MIMD architecture is designed for big data analysis. Adopting the configurable counting engine array with 3-layer dimension merging, the D2MLP processes maximal 1-128/1024 dimensional data with parallel 64/8 queries in learning stage. Implement in 90nm CMOS technology, the D2MLP achieves 219.9x and 8.2x faster processing time than CPU and GPGPU, respectively. In application phase, maximal 22.7k 128-class classifications/s are performed with the learned density model. Operated at 1.0V and 165MHz, the D2MLP demonstrates an energy-efficient solution for learning and classification with 7.11mJ/Gb/query and 2.3μJ/classification, respectively.

Original languageEnglish
Title of host publication2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479933273
DOIs
StatePublished - 1 Jan 2014
Event28th IEEE Symposium on VLSI Circuits, VLSIC 2014 - Honolulu, HI, United States
Duration: 10 Jun 201413 Jun 2014

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference28th IEEE Symposium on VLSI Circuits, VLSIC 2014
CountryUnited States
CityHonolulu, HI
Period10/06/1413/06/14

Fingerprint Dive into the research topics of 'A 7.11mJ/Gb/query data-driven machine learning processor (D<sup>2</sup>MLP) for big data analysis and applications'. Together they form a unique fingerprint.

Cite this