A 65nm CMOS 88-105 GHz DDFS-based fractional synthesizer for high resolution planetary exploration spectroscopy

A. Tang, T. Reck, Y. Kim, G. Virbila, G. Chattopadhyay, Mau-Chung Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

This paper presents a fractional 88-105 GHz frequency synthesizer module developed to support THz spectrometer instruments for planetary exploration. The presented module features low power operation and a small form factor to be compatible with the demanding payload requirements of NASA planetary missions. The core of the module is a CMOS System-on-Chip (SoC) containing a 50 GHz phase-lock loop and W-band frequency doubler, driven by a direct digital frequency synthesizer (DDFS) and DAC to provide finely tuned reference frequencies allowing fractional operation. The chip contains a wide range of calibration functions for temperature and radiation exposure compensation. The demonstrated module draws a total of 152 mW of power from a USB connection and provides coverage from 88-105 GHz with output powers up to -15 dBm. The offered mid-band phase noise is measured at 89.5 dBc/Hz evaluated at 1 MHz offset from the carrier.

Original languageEnglish
Title of host publication2016 IEEE MTT-S International Microwave Symposium, IMS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509006984
DOIs
StatePublished - 9 Aug 2016
Event2016 IEEE MTT-S International Microwave Symposium, IMS 2016 - San Francisco, United States
Duration: 22 May 201627 May 2016

Publication series

NameIEEE MTT-S International Microwave Symposium Digest
Volume2016-August
ISSN (Print)0149-645X

Conference

Conference2016 IEEE MTT-S International Microwave Symposium, IMS 2016
CountryUnited States
CitySan Francisco
Period22/05/1627/05/16

Keywords

  • Fractional W-Band
  • Phase-Lock Loop
  • PISSARRO PLL

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