A 60GHz CMOS VCO using on-chip resonator with embedded artificial dielectric for size, loss and noise reduction

Daquan Huang*, William Hant, Ning Yi Wang, Tai W. Ku, Qun Gu, Raymond Wong, Mau-Chung Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

61 Scopus citations

Abstract

An on-chip resonator with artificial dielectric in place of the LC tank yields reduced metal/substrate losses, higher resonator Q and aλ/4 length reduction of 4.7 times. The VCO uses 90nm CMOS, with 0.015mn 2 area, consumes 1.9nm and has a measured phase noise of -100dBc/Hz at 1MHz offset. The FOM is -193dBc/Hz.

Original languageEnglish
Title of host publication2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
DOIs
StatePublished - 1 Dec 2006
Event2006 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: 6 Feb 20069 Feb 2006

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Conference

Conference2006 IEEE International Solid-State Circuits Conference, ISSCC
CountryUnited States
CitySan Francisco, CA
Period6/02/069/02/06

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    Huang, D., Hant, W., Wang, N. Y., Ku, T. W., Gu, Q., Wong, R., & Chang, M-C. (2006). A 60GHz CMOS VCO using on-chip resonator with embedded artificial dielectric for size, loss and noise reduction. In 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers [1696168] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2006.1696168