A 60GHz CMOS differential receiver front-end using on-chip transformer for 1.2 volt operation with enhanced gain and linearity

Daquan Huang*, Raymond Wong, Qun Gu, Ning Yi Wang, Tai W. Ku, Charles Chien, Mau-Chung Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

22 Scopus citations

Abstract

A compact 60GHz CMOS differential direct conversion receiver front-end based on eight-metal-layer interleaved onchip transformers is realized for low voltage (1.2V) and high gain (24dB) operation with input IdB compression point of -11dBm, Noise Figure of 10.5dB and power consumption of 4.3mW/arm. Compared with prior arts in CMOS, this receiver achieves the highest gain without an output buffer, highest linearity, lowest noise, and lowest power consumption with smallest die area of 0.022mm 2 .

Original languageEnglish
Title of host publication2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages144-145
Number of pages2
DOIs
StatePublished - 1 Dec 2006
Event2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States
Duration: 15 Jun 200617 Jun 2006

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference2006 Symposium on VLSI Circuits, VLSIC
CountryUnited States
CityHonolulu, HI
Period15/06/0617/06/06

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