A 60 GHz tunable output profile power amplifier in 65 nm CMOS

Jenny Yi Chun Liu*, Qun Jane Gu, Adrian Tang, Ning Yi Wang, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

13 Scopus citations


A fully integrated three-stage 60 GHz power amplifier with amplitude/phase compensation is realized in 65 nm CMOS. An adaptive feedback bias scheme with three control knobs is proposed to extend the linear operating region. At a supply voltage of 1 V, the fully differential amplifier achieves a linear gain of 15 dB and occupies a compact area of 0.056 mm2. It achieves a minimal Psat -P1dB separation of 0.6 dB by extending the P1dB by 8.5 dB. To our best knowledge, this is the smallest P sat -P1dB separation reported to date. With on-chip phase compensation, the output phase variation is reduced by 57%.

Original languageEnglish
Article number5898436
Pages (from-to)377-379
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Issue number7
StatePublished - 1 Jul 2011


  • CMOS
  • millimeter wave
  • power amplifier (PA)
  • transformers

Fingerprint Dive into the research topics of 'A 60 GHz tunable output profile power amplifier in 65 nm CMOS'. Together they form a unique fingerprint.

Cite this