A 60 GHz injection-locked frequency tripler with spur suppression

Chien-Nan Kuo*, Tzu Chao Yan

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

27 Scopus citations

Abstract

A 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics. Several circuit designs are utilized in the harmonic current injection circuit to maximize the third-order harmonic and minimize the undesired harmonic current outputs, including notch filters and a capacitive cross-coupled transistor pair. With the input signal of 0.5 dBm at 19.7 GHz, the harmonic rejection ratios of the fundamental, and the second-order achieve 31.3 dBc, and 45.8 dBc, respectively. Implemented in 0.13 μm CMOS technology, the core circuit consumes power of 9.96 mW with 1.2 V supply voltage. The entire die occupies an area of 985 × 866 μm2

Original languageEnglish
Article number5565362
Pages (from-to)560-562
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume20
Issue number10
DOIs
StatePublished - 1 Oct 2010

Keywords

  • Capacitive cross-coupling
  • frequency tripler
  • injection-locking
  • notch filter

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