A 60 GHz high gain transformer-coupled differential cascode power amplifier in 65nm CMOS

Jenny Yi Chun Liu*, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

Abstract

A fully differential high gain V-band three-stage transformer-coupled power amplifier (PA) is designed and implemented in 65 nm CMOS process. On-chip transformers which offer DC biasing for individual stages, extra stabilization mechanism, single-ended to differential conversion, and input/inter-stage/output matching are used to facilitate a compact amplifier design. The design and optimization methodologies of active and passive devices are presented. With a cascode configuration, the amplifier achieves a linear gain of 30.5 dB centered at 63.5 GHz and a -40 dB reverse isolation under a 1V supply, which compares favorably to recent published V-band PAs. The amplifier delivers 9 dBm and 13 dBm saturation output power (Psat) under 1V and 1.5V supplies, respectively, and occupies a core chip area of 0.05mm2. The measurement results validate a high gain and area-efficient power amplifier design methodology in deep-scaled CMOS for applications in millimeter-wave communication.

Original languageEnglish
Pages (from-to)1508-1514
Number of pages7
JournalIEICE Transactions on Electronics
VolumeE94-C
Issue number10
DOIs
StatePublished - 1 Jan 2011

Keywords

  • CMOS
  • Integrated circuits
  • Millimeter-wave
  • Power amplifier
  • V-band

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