This study proposes a 368 x 184 optical under-display fingerprint sensor designed and prototyped using the 0.11-mu m CIS technology. The prototype sensor includes a hybrid array of global and rolling shutter pixels and a shared pixel-level analog-to-digital converter (ADC) embedded in a 32-pixel sub-array configuration. It features a fast response time and low power consumption. By directly coupling the ramp signal to a floating diffusion capacitor with shared pixels, the best compromise between full-well capacity (FWC) and conversion gain is achieved. Two sets of memory (184 x 92 bytes) are also embedded in the pixel array to save the costs of external memory. A dynamic range of 110 dB is achieved with eight-segment automatic exposure and a contrast enhancement scheme for black level correction. A pixel binning process is used to improve the sensor sensitivity. The measured FWC, sensitivity, and conversion gain are 95 ke-, 800 ke-/lux-s, and 340 mu V/e-, respectively. The prototype fingerprint sensor consumes only 15 mW with a 33-V supply voltage. The sensor chip size is 9.74 mm x 4.6 mm, and the sensing area is 8 mm x 4 mm, which is 71.4% of the chip size. The resolutions of the sensor without and with the pixel binning process are 1154 and 572 dpi, respectively.
- CMOS image sensor
- fingerprint sensor
- high dynamic range (HDR)
- hybrid arrays of global and rolling shutter
- shared pixel-level analog-to-digital converters (ADCs)
- under-display fingerprint sensor