A 310 GHz CMOS UWB low-noise amplifier with ESD protection circuits

Chung-Yu Wu*, Yi K. Lo, Min Chiao Chen

*Corresponding author for this work

Research output: Contribution to journalArticle

21 Scopus citations

Abstract

A low-power fully integrated low-noise amplifier (LNA) with an on-chip electrostatic-static discharge (ESD) protection circuit for ultra-wide band (UWB) applications is presented. With the use of a common-gate scheme with a Gm-boosted technique, a simple input matching network, low noise figure (NF), and low power consumption can be achieved. Through the combination of an input matching network, an ESD clamp circuit has been designed for the proposed LNA circuit to enhance system robustness. The measured results show that the fabricated LNA can be operated over the full UWB bandwidth of 3.0 to 10.35 GHz. The input return loss S11and output return loss S 22are less than -8.3dB and -9dB, respectively. The measured power gain S21is 11 1.5dB, and the measured minimum NF is 3.3 dB at 4 GHz. The dc power dissipation is 7.2 mW from a 1.2 V supply. The chip area, including testing pads, is 1.05 mm0.73 mm.

Original languageEnglish
Article number5290008
Pages (from-to)737-739
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume19
Issue number11
DOIs
StatePublished - 1 Nov 2009

Keywords

  • CMOS
  • Electrostatic discharge (ESD)
  • Low-noise amplifier (LNA)
  • Ultra-wide band (UWB)

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