A 30 nm gate-all-around poly-Si nano wire thin-film transistor

Chen Ming Lee*, Bing-Yue Tsui

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

In this work, gate-all-around (GAA) poly-Si nano wire (NW) thin film transistors (TFTs) with record physical gate length of 30 nm and driving current >100 μA/μm are demonstrated. The cross section of the NW channel is as small as 35 nm x 8 nm. The tight GAA and NW structure enhances the gate potential control ability effectively, therefore, excellent short channel and narrow width behaviors can be obtained. These results reveal the possibility of three-dimensional integrated circuits.

Original languageEnglish
Title of host publicationProceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010
Pages28-29
Number of pages2
DOIs
StatePublished - 20 Oct 2010
Event2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 - Hsin Chu, Taiwan
Duration: 26 Apr 201028 Apr 2010

Publication series

NameProceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010

Conference

Conference2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010
CountryTaiwan
CityHsin Chu
Period26/04/1028/04/10

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    Lee, C. M., & Tsui, B-Y. (2010). A 30 nm gate-all-around poly-Si nano wire thin-film transistor. In Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 (pp. 28-29). [5488964] (Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010). https://doi.org/10.1109/VTSA.2010.5488964