This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.
|Number of pages||4|
|State||Published - 1 Jan 2002|
|Event||2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States|
Duration: 2 Jun 2002 → 4 Jun 2002
|Conference||2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium|
|Period||2/06/02 → 4/06/02|