A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer

Wei-Zen Chen*, Jia Xian Chang, Ying Jen Hong, Meng Tzer Wong, Chien Liang Kuo

*Corresponding author for this work

Research output: Contribution to conferencePaper

3 Scopus citations

Abstract

This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.

Original languageEnglish
Pages169-172
Number of pages4
StatePublished - 1 Jan 2002
Event2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States
Duration: 2 Jun 20024 Jun 2002

Conference

Conference2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
CountryUnited States
CitySeatle, WA
Period2/06/024/06/02

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    Chen, W-Z., Chang, J. X., Hong, Y. J., Wong, M. T., & Kuo, C. L. (2002). A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer. 169-172. Paper presented at 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Seatle, WA, United States.