A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC

K. Runge; D. Daniel; J. L. Gimlett; R. L. Pierson; Mau-Chung Chang; K. C. Wang; D. M. Chen

doi:10.1109/GAAS.1991.172680

A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC

K. Runge^*, D. Daniel, J. L. Gimlett, R. L. Pierson, Mau-Chung Chang, K. C. Wang, D. M. Chen

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

Abstract

A high-speed multiplexer integrated circuit capable of handling four simultaneous data channels without external delay lines is presented. The experimental circuit features an inherently fast two-stage configuration, with operation up to 27 Gb/s demonstrated based on a baseline AlGaAs/GaAs heterojunction bipolar technology. The system clock frequency is one half of the bit rate, with only one additional self-generated internal clock necessary. A unique circuit topology has been chosen, which acquires, delays, regenerates, and retimes the incoming data.

Original language	English
Title of host publication	Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
Publisher	Publ by IEEE
Pages	233-236
Number of pages	4
ISBN (Print)	078030196X
DOIs	https://doi.org/10.1109/GAAS.1991.172680
State	Published - 1 Jan 1992
Event	13th Annual GaAs IC Symposium Technical Digest - Monterey, CA, USA Duration: 20 Oct 1991 → 23 Oct 1991

Publication series

Name	Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Conference

Conference	13th Annual GaAs IC Symposium Technical Digest
City	Monterey, CA, USA
Period	20/10/91 → 23/10/91

Access to Document

10.1109/GAAS.1991.172680

Link to publication in Scopus

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Runge, K., Daniel, D., Gimlett, J. L., Pierson, R. L., Chang, M-C., Wang, K. C., & Chen, D. M. (1992). A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC. In Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit) (pp. 233-236). (Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)). Publ by IEEE. https://doi.org/10.1109/GAAS.1991.172680

@inproceedings{62a8e0436cf248cabbd6793f6e643e79,

title = "A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC",

abstract = "A high-speed multiplexer integrated circuit capable of handling four simultaneous data channels without external delay lines is presented. The experimental circuit features an inherently fast two-stage configuration, with operation up to 27 Gb/s demonstrated based on a baseline AlGaAs/GaAs heterojunction bipolar technology. The system clock frequency is one half of the bit rate, with only one additional self-generated internal clock necessary. A unique circuit topology has been chosen, which acquires, delays, regenerates, and retimes the incoming data.",

author = "K. Runge and D. Daniel and Gimlett, {J. L.} and Pierson, {R. L.} and Mau-Chung Chang and Wang, {K. C.} and Chen, {D. M.}",

year = "1992",

month = jan,

day = "1",

doi = "10.1109/GAAS.1991.172680",

language = "English",

isbn = "078030196X",

series = "Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)",

publisher = "Publ by IEEE",

pages = "233--236",

booktitle = "Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)",

note = "null ; Conference date: 20-10-1991 Through 23-10-1991",

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Runge, K, Daniel, D, Gimlett, JL, Pierson, RL, Chang, M-C, Wang, KC & Chen, DM 1992, A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC. in Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit). Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit), Publ by IEEE, pp. 233-236, 13th Annual GaAs IC Symposium Technical Digest, Monterey, CA, USA, 20/10/91. https://doi.org/10.1109/GAAS.1991.172680

A 27 Gb/s AlGaAs/GaAs HBT 4:1 multiplexer IC. / Runge, K.; Daniel, D.; Gimlett, J. L.; Pierson, R. L.; Chang, Mau-Chung; Wang, K. C.; Chen, D. M.

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit). Publ by IEEE, 1992. p. 233-236 (Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Runge, K.

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AU - Chang, Mau-Chung

AU - Wang, K. C.

AU - Chen, D. M.

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N2 - A high-speed multiplexer integrated circuit capable of handling four simultaneous data channels without external delay lines is presented. The experimental circuit features an inherently fast two-stage configuration, with operation up to 27 Gb/s demonstrated based on a baseline AlGaAs/GaAs heterojunction bipolar technology. The system clock frequency is one half of the bit rate, with only one additional self-generated internal clock necessary. A unique circuit topology has been chosen, which acquires, delays, regenerates, and retimes the incoming data.

AB - A high-speed multiplexer integrated circuit capable of handling four simultaneous data channels without external delay lines is presented. The experimental circuit features an inherently fast two-stage configuration, with operation up to 27 Gb/s demonstrated based on a baseline AlGaAs/GaAs heterojunction bipolar technology. The system clock frequency is one half of the bit rate, with only one additional self-generated internal clock necessary. A unique circuit topology has been chosen, which acquires, delays, regenerates, and retimes the incoming data.

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DO - 10.1109/GAAS.1991.172680

M3 - Conference contribution

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BT - Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

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