A 242mW, 10mm2 1080p H.264/AVC high profile encoder chip

Yu Kun Lin*, De Wei Li, Chia Chun Lin, Tzu Yun Kuo, Sian Jin Wu, Wei Cheng Tai, Wei Cheng Chang, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

16 Scopus citations


A 1080p high profile H.264 encoder is designed by the robust reusable silicon IP methodology and fabricated in a 0.13μm CMOS technology with an area of 10 mm2 and 242mW at 145MHz. Compared to the state-of-the-art design targeted at 720p baseline, this design reduces 53.4% power and 46.7% area through parallelism enhanced throughput and cross stage sharing pipeline.

Original languageEnglish
Title of host publicationProceedings of the 45th Design Automation Conference, DAC
Number of pages6
StatePublished - 17 Sep 2008
Event45th Design Automation Conference, DAC - Anaheim, CA, United States
Duration: 8 Jun 200813 Jun 2008

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X


Conference45th Design Automation Conference, DAC
CountryUnited States
CityAnaheim, CA


  • 1080p
  • Encoder
  • H.264
  • High Profile

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