A 242mW, 10mm2 1080p H.264/AVC high profile encoder chip

Yu Kun Lin; De Wei Li; Chia Chun Lin; Tzu Yun Kuo; Sian Jin Wu; Wei Cheng Tai; Wei Cheng Chang; Tian-Sheuan Chang

doi:10.1109/DAC.2008.4555786

A 242mW, 10mm² 1080p H.264/AVC high profile encoder chip

Yu Kun Lin^*, De Wei Li, Chia Chun Lin, Tzu Yun Kuo, Sian Jin Wu, Wei Cheng Tai, Wei Cheng Chang, Tian-Sheuan Chang

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

16 Scopus citations

Abstract

A 1080p high profile H.264 encoder is designed by the robust reusable silicon IP methodology and fabricated in a 0.13μm CMOS technology with an area of 10 mm² and 242mW at 145MHz. Compared to the state-of-the-art design targeted at 720p baseline, this design reduces 53.4% power and 46.7% area through parallelism enhanced throughput and cross stage sharing pipeline.

Original language	English
Title of host publication	Proceedings of the 45th Design Automation Conference, DAC
Pages	78-83
Number of pages	6
DOIs	https://doi.org/10.1109/DAC.2008.4555786
State	Published - 17 Sep 2008
Event	45th Design Automation Conference, DAC - Anaheim, CA, United States Duration: 8 Jun 2008 → 13 Jun 2008

Publication series

Name	Proceedings - Design Automation Conference
ISSN (Print)	0738-100X

Conference

Conference	45th Design Automation Conference, DAC
Country	United States
City	Anaheim, CA
Period	8/06/08 → 13/06/08

Keywords

1080p
Encoder
H.264
High Profile

Access to Document

10.1109/DAC.2008.4555786

Link to publication in Scopus

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title = "A 242mW, 10mm2 1080p H.264/AVC high profile encoder chip",

abstract = "A 1080p high profile H.264 encoder is designed by the robust reusable silicon IP methodology and fabricated in a 0.13μm CMOS technology with an area of 10 mm2 and 242mW at 145MHz. Compared to the state-of-the-art design targeted at 720p baseline, this design reduces 53.4% power and 46.7% area through parallelism enhanced throughput and cross stage sharing pipeline.",

keywords = "1080p, Encoder, H.264, High Profile",

author = "Lin, {Yu Kun} and Li, {De Wei} and Lin, {Chia Chun} and Kuo, {Tzu Yun} and Wu, {Sian Jin} and Tai, {Wei Cheng} and Chang, {Wei Cheng} and Tian-Sheuan Chang",

year = "2008",

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day = "17",

doi = "10.1109/DAC.2008.4555786",

language = "English",

isbn = "9781605581156",

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booktitle = "Proceedings of the 45th Design Automation Conference, DAC",

note = "null ; Conference date: 08-06-2008 Through 13-06-2008",

}

Lin, YK, Li, DW, Lin, CC, Kuo, TY, Wu, SJ, Tai, WC, Chang, WC & Chang, T-S 2008, A 242mW, 10mm² 1080p H.264/AVC high profile encoder chip. in Proceedings of the 45th Design Automation Conference, DAC., 4555786, Proceedings - Design Automation Conference, pp. 78-83, 45th Design Automation Conference, DAC, Anaheim, CA, United States, 8/06/08. https://doi.org/10.1109/DAC.2008.4555786

A 242mW, 10mm² 1080p H.264/AVC high profile encoder chip. / Lin, Yu Kun; Li, De Wei; Lin, Chia Chun; Kuo, Tzu Yun; Wu, Sian Jin; Tai, Wei Cheng; Chang, Wei Cheng; Chang, Tian-Sheuan.

Proceedings of the 45th Design Automation Conference, DAC. 2008. p. 78-83 4555786 (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Tai, Wei Cheng

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