@inproceedings{4a3e54cdcc1e4c088a28579cd38ff43b,
title = "A 24-GHz High Linearity Down-conversion Mixer in 90-nm CMOS",
abstract = " A 24-GHz high linearity down-conversion mixer in 90-nm CMOS is presented in this paper. The mixer utilizes folded architecture, LC tank, distributed derivative superposition (DS) linearization technique to achieve high linearity with relatively low power. The mixer achieves 0 dBm IP_1\mathbfdB. The mixer provides-3 dB conversion gain and the IIP 3 is 21 dBm with only 10-mW dc consumption. ",
keywords = "CMOS, folded architecture, mixer",
author = "Feifei Chen and Yunshan Wang and Lin, {Jung Lin} and Zuo-Min Tsai and Huei Wang",
year = "2018",
month = nov,
day = "5",
doi = "10.1109/RFIT.2018.8524128",
language = "English",
series = "2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018",
address = "United States",
note = "null ; Conference date: 15-08-2018 Through 17-08-2018",
}