@inproceedings{6ef40a272d9246feb5ee00ea1dc47f76,
title = "A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided Devices",
abstract = "This paper proposes an acoustic DSP processor with a neural network core for speech enhancement. Accelerators for convolutional neural network (CNN) and fast Fourier transform (FFT) are embedded. The CNN-based speech enhancement algorithm takes the speech signals spectrogram as the model's input, and predicts the desired mask of speech to enhance speech intelligibility after passing through the CNN model. An array of multiply-accumulator (MAC) and coordinate rotation digital computer (CORDIC) engines are deployed to efficiently compute linear and nonlinear functions. Hardware sharing is applied to reduce hardware area by leveraging the high similarity between CNN and FFT computations. The proposed DSP processor chip is fabricated in a 40-nm CMOS technology with a core area of 4.3 mm2. The chip's power dissipation is 2.17 mW at an operating frequency of 5 MHz. The CNN accelerator supports both convolutional and fully-connected layers and achieves an energy efficiency of 1200-to-2180 GOPS/W, despite the flexibility for FFT. The speech intelligibility can be enhanced by up to 41% under low SNR conditions.",
keywords = "CMOS integrated circuits, convolutional neural network (CNN), fast Fourier transform (FFT), reconfigurable architecture, Speech Enhancement",
author = "Lee, {Yu Chi} and Chi, {Tai Shih} and Yang, {Chia Hsiang}",
year = "2019",
month = mar,
doi = "10.1109/AICAS.2019.8771631",
language = "English",
series = "Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "97--101",
booktitle = "Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019",
address = "United States",
note = "null ; Conference date: 18-03-2019 Through 20-03-2019",
}