A (204, 188) reed-solomon decoder using decomposed Euclidean algorithm

Hsie-Chia Chang*, Chih Yu Cheng, Shu Hui Tsai, Chen-Yi Lee

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

Abstract

A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.

Original languageEnglish
Pages262-265
Number of pages4
DOIs
StatePublished - 1 Dec 2000
Event43rd Midwest Circuits and Systems Conference (MWSCAS-2000) - Lansing, MI, United States
Duration: 8 Aug 200011 Aug 2000

Conference

Conference43rd Midwest Circuits and Systems Conference (MWSCAS-2000)
CountryUnited States
CityLansing, MI
Period8/08/0011/08/00

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