A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient Key Equation Solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS 1P4M standard cells, where the total gate count is about 16K ∼ 17K. Test results show that the RS decoder chip can run up to 87MHz.
|Number of pages||4|
|State||Published - 1 Dec 2000|
|Event||43rd Midwest Circuits and Systems Conference (MWSCAS-2000) - Lansing, MI, United States|
Duration: 8 Aug 2000 → 11 Aug 2000
|Conference||43rd Midwest Circuits and Systems Conference (MWSCAS-2000)|
|Period||8/08/00 → 11/08/00|