A 135 MHz 542 k gates high throughput H.264/AVC scalable high profile decoder

Gwo Long Li*, Yu Chen Chen, Yuan Hsin Liao, Po Yuan Hsu, Meng Hsun Wen, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

To satisfy the requirement of application heterogeneities, the latest H.264/AVC based video coding standard called scalable video coding additional includes temporal, SNR, and spatial scalabilities for frame rate, quality, and frame resolution adaptation. However, these inclusions significantly increase chip design difficulties such as decoding time, memory bandwidth, and area cost. This paper presents an H.264/AVC scalable high profile decoder realization with several optimization techniques to provide high throughput video decoding. For decoding flow, this paper proposes an one-pass macroblock-based quality layer decoding flow for SNR scalability and 71% of external memory bandwidth and 66% of macroblock processing cycles can be saved. For texture padding in interlayer intra prediction, the modified padding flow can save 26% of decoding time. For interlayer predictor design, this paper proposes a centralized concept for accumulation-based calculation of corresponding spatial position, simplified poly-phase interpolator, and efficient motion vector generator to save area cost and decoding time. Furthermore, the residual reconstruction path with the parallel-pipeline architecture is also proposed to cope with the additional decoding complexity and thus leads to 54% of gate count savings compared to the traditional serial-pipeline architecture. Finally, the proposed H.264/AVC scalable high profile decoder design is implemented with 90 nm CMOS technology and it costs 542 k gate count and 39.66 Kbytes on-chip memory while is capable to decode 60 frames/s for CIF + SD480p HD1080p resolution with three quality layers at 135 MHz operating frequency.

Original languageEnglish
Article number6041017
Pages (from-to)626-635
Number of pages10
JournalIEEE Transactions on Circuits and Systems for Video Technology
Volume22
Issue number4
DOIs
StatePublished - 1 Apr 2012

Keywords

  • SVC decoder
  • Scalable video coding (SVC)
  • very large scale integration (VLSI) design

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